Verification Interacting with Synthesis -- Users' Mailing List Archive
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Starting: Sat Aug 30 2003 - 16:08:05 MDT
Ending: Mon Apr 13 2009 - 09:23:35 MDT

• 022021074@fudan.edu.cn
  • how can i download mdd and bdd package you use (Thu Oct 23 2003 - 01:50:10 MDT)
• 022021074_at_fudan.edu.cn
  • vis installing after reconstructing cygwin (Fri Apr 02 2004 - 06:09:25 MST)
  • 隙葩:Re: your mail (Fri Mar 12 2004 - 06:55:41 MST)
  • 隙葩:Re: your mail (Fri Mar 12 2004 - 06:04:40 MST)
  • (no subject) (Tue Mar 02 2004 - 21:19:13 MST)
  • question on iscas89 benchmark (Mon Nov 24 2003 - 01:26:50 MST)
  • vis study (Thu Nov 06 2003 - 01:21:44 MST)
• 062052002_at_fudan.edu.cn
  • re:a question about building bdd tree with CU Decision Diagram Package (Thu Oct 19 2006 - 21:00:17 MDT)
  • re: a question about building bdd tree with CU Decision Diagram Package (Thu Oct 19 2006 - 07:08:46 MDT)
  • a question about building bdd tree with CU Decision Diagram Package (Wed Oct 18 2006 - 07:24:15 MDT)
• Abhijit Das
  • vl2mv compilation problem with gcc3.3.1 (Tue Nov 25 2003 - 10:09:47 MST)
• abujarad_at_egr.msu.edu
  • Glu-2.1/Mdd and Threads (Wed Mar 25 2009 - 13:45:37 MDT)
• Adam Hines
  • Best kept Google AdWords Secrets showing you how to earn thousands (Sat Feb 14 2004 - 03:01:51 MST)
• Aditya Kesiraju
  • Re: Vis installation problems on Solaris (Tue Jun 06 2006 - 09:38:00 MDT)
  • Vis installation problems on Solaris (Tue May 30 2006 - 17:47:17 MDT)
• Adnan Aziz
  • Re: circuit minimization through vis? (Mon Jun 27 2005 - 15:54:18 MDT)
  • Re: reconvergence algorithm (Mon Jun 27 2005 - 15:39:39 MDT)
  • Re: Finding a Variable Ordering (Thu Jun 23 2005 - 14:18:12 MDT)
  • status of vis (Thu Apr 28 2005 - 11:28:29 MDT)
• Adonis Lin
  • Please help me, I cannot download the (vl2mv-2.1.tar.gz) (Tue May 06 2008 - 07:03:06 MDT)
• Adrian de Rivero
  • help with the blif-mvs file format (Thu Jan 27 2005 - 06:44:20 MST)
• akannan_at_cedt.iisc.ernet.in
  • RE: VIS Installation Help (Sun Feb 04 2007 - 12:34:58 MST)
• Alberto Palacios Pawlovsky
  • Re: trying to build vis2.0 on OS X (Tue May 18 2004 - 03:10:50 MDT)
  • trying to build vis2.0 on OS X (Mon May 17 2004 - 19:42:23 MDT)
• Ali Ebnenasir
  • setting the Then/Else pointers (Sun Sep 23 2007 - 13:11:11 MDT)
• Aly Farahat
  • mvsis for minimizing and printing MDD's (Mon Apr 13 2009 - 09:21:27 MDT)
  • Re: your mail (Thu Jan 08 2009 - 19:33:04 MST)
  • (no subject) (Mon Jan 05 2009 - 16:34:39 MST)
• Ana Olteanu
  • Fwd: URGENT PROBLEM (Mon May 21 2007 - 02:50:35 MDT)
  • URGENT PROBLEM (Sun May 20 2007 - 12:53:55 MDT)
• Andrea Fedeli
  • Re: PSL syntax in VIS (Thu Nov 06 2008 - 11:55:11 MST)
  • Re: Latch inference in VIS for Verilog models (2) (Fri Aug 15 2008 - 05:18:03 MDT)
  • Re: Latch inference in VIS for Verilog models (Fri Aug 15 2008 - 00:01:43 MDT)
  • Re: Can't run check_invariant -A4 (The puresat algorithm) (Sat Mar 31 2007 - 23:01:39 MDT)
  • Re: Can't run check_invariant -A4 (The puresat algorithm) (Fri Mar 30 2007 - 16:15:42 MDT)
  • Re: Can't VIS a simple Verilog (Tue Mar 27 2007 - 22:58:59 MDT)
• Andrew Burnside
  • RE: vl2mv (Sat Nov 05 2005 - 02:35:31 MST)
  • Unknown construct (Mon Oct 31 2005 - 02:22:49 MST)
  • vl2mv (Sun Oct 30 2005 - 13:49:32 MST)
• angela pappagallo
  • About (Sat Jul 02 2005 - 02:46:01 MDT)
  • About combinational circuits (Sat Jul 02 2005 - 02:47:56 MDT)
  • Re: help: Cannot perform flatten_hierarchy Table a._n3345 is not deterministic (Tue Apr 12 2005 - 06:34:12 MDT)
  • Help about blif mv (Fri Mar 18 2005 - 03:08:37 MST)
• Aritra Hazra
  • VIS Error in doing BMC of LTL Formula... Help !! (Thu Jul 03 2008 - 02:59:17 MDT)
  • Fw: Help !! VIS Error !! The hierarchy manager is empty. Read in design. (Fri Jun 27 2008 - 04:17:45 MDT)
  • Help !! VIS Error !! The hierarchy manager is empty. Read in design. (Tue Jun 24 2008 - 00:57:26 MDT)
  • Help !! VIS Error !! The hierarchy manager is empty. Read in design. (Tue Jun 24 2008 - 05:31:02 MDT)
  • Help !! VIS Error !! The hierarchy manager is empty. Read in design. (Tue Jun 24 2008 - 21:00:44 MDT)
  • Help !! VIS Error !! (Mon Jun 23 2008 - 10:23:14 MDT)
  • VIS ERROR -- NEED HELP !! (Tue Jun 10 2008 - 22:09:53 MDT)
• Ashish Darbari
  • Open cores in Verlilog synthesizable with vl2mv (Wed Apr 04 2007 - 08:22:55 MDT)
• Balaji U
  • Re: Can't VIS a simple Verilog (Wed Mar 28 2007 - 00:39:08 MDT)
• Balaji Vaidyanathan
  • SIS input vector querry (Wed Jun 28 2006 - 10:12:18 MDT)
• Belinda Horne
  • POTENTIAL SPAM: Best prices for u (Mon Mar 05 2007 - 13:10:05 MST)
• BHARGAV
  • Request For VIS Examples (Sun Oct 24 2004 - 10:45:56 MDT)
• Bing.Li_at_colorado.edu
  • Fwd: Re: Help on error "# BMC: SAT Solver failed, try again" when runing arbiter example (Fri Aug 26 2005 - 15:23:54 MDT)
• Borzoo Bonakdarpour
  • SSS 2009 - First Call for Papers (Thu Feb 05 2009 - 07:42:04 MST)
  • Re: Multi-threading in Glu/Cudd (Thu Dec 20 2007 - 17:04:35 MST)
  • Multi-threading in Glu/Cudd (Thu Dec 20 2007 - 15:10:35 MST)
  • Mdd/Glu vs. Cudd/Bdd (Fri May 04 2007 - 12:50:34 MDT)
  • programming documention/exampls on GLU 2.1 and MDDs (Mon Dec 04 2006 - 13:42:41 MST)
• Bud Blankenship
  • Amazing Software Deals curse dissidents about 844 (Thu May 20 2004 - 05:09:12 MDT)
• Cecil Kimble
  • You went to school and got no diploma? We can fix that... (Fri Mar 26 2004 - 08:52:59 MST)
• Cecile BRAUNSTEIN
  • Problem vis install (Tue Apr 07 2009 - 06:48:48 MDT)
• Cedric Roux
  • Re: Any function that can transfer a MDD to BDD in VIS? (Mon Oct 18 2004 - 03:44:12 MDT)
  • Re: Incomprehensive error message (Fri Apr 09 2004 - 04:08:28 MDT)
  • Re: problem with "simulate" (Wed Jan 21 2004 - 04:35:17 MST)
  • problem with "simulate" (Tue Jan 20 2004 - 07:19:17 MST)
• Chao Wang
  • Re: Logic bug in the VIS GRAB package? (Mon Oct 15 2007 - 07:45:55 MDT)
  • Re: About backward reachable analysis (Tue May 08 2007 - 19:36:25 MDT)
  • Re: About backward reachable analysis (Tue May 08 2007 - 12:01:04 MDT)
  • Porting & Testing Volunteers for VIS-2.1 (Sat Jul 24 2004 - 12:04:07 MDT)
  • Re: Calling check_inv several times (Mon Jul 19 2004 - 14:45:07 MDT)
  • Re: ltl_to_aut (Thu Mar 25 2004 - 15:27:00 MST)
  • Re: your mail (Fri Mar 12 2004 - 00:25:03 MST)
  • Re: problem with "simulate" (Sun Jan 25 2004 - 11:29:40 MST)
  • Re: problem with "simulate" (Tue Jan 20 2004 - 16:30:41 MST)
  • Re: reductions in LTL model checking (Tue Jan 20 2004 - 15:51:34 MST)
  • vl2mv-2.01 is available for download (Tue Jan 13 2004 - 15:13:18 MST)
  • Re: Reachability information (Sat Nov 08 2003 - 10:41:14 MST)
  • Re: how to represent 16-bit inputs (Wed Nov 05 2003 - 01:42:39 MST)
  • Re: how to construct the BDD with many dc function (Wed Nov 05 2003 - 01:29:39 MST)
  • Re: vl2mv issue (Fri Oct 31 2003 - 11:51:46 MST)
  • Re: vl2mv issue (Fri Oct 31 2003 - 11:40:46 MST)
  • Re: VIS Installation for Windows ! (Mon Oct 27 2003 - 18:38:39 MST)
  • Re: how can i download mdd and bdd package you use (Thu Oct 23 2003 - 12:19:19 MDT)
  • Re: Variable names for BDD indices (Sun Sep 21 2003 - 20:59:02 MDT)
  • TEST, after upgrading the mailing list archive system (Sat Aug 30 2003 - 16:04:50 MDT)
• Charity Scott
  • POTENTIAL SPAM: Looking for perfect sex (Tue Feb 20 2007 - 18:22:22 MST)
• Charles Thangaraj
  • RE: help (Mon Jun 21 2004 - 11:55:53 MDT)
  • RE: question on iscas89 benchmark (Mon Nov 24 2003 - 11:44:54 MST)
• chc
  • Re: Porting & Testing Volunteers for VIS-2.1 (Sun Jul 25 2004 - 20:53:20 MDT)
• Christian Miller
  • Re: VHDL to BLIF issue (LEON2) (Wed Jan 10 2007 - 05:00:20 MST)
• cwei_at_ios.ac.cn
  • Re: who has dot tool? Can I share it? (Thu Aug 23 2007 - 22:21:53 MDT)
• David Howland
  • Re: dump to blif (Thu Jun 03 2004 - 20:39:32 MDT)
• David M. Witten II
  • Re: Hello VIS users (Thu Nov 01 2007 - 09:38:57 MDT)
• Denis Parks
  • get the job you deserve with a university degree - no classes needed! (Mon Mar 15 2004 - 10:12:46 MST)
• dennyhuang_at_fudan.edu.cn
  • Can not download the source code (Mon Apr 02 2007 - 21:14:00 MDT)
• Dhammika Kurumbalapitiya
  • vl2mv issue (Tue Oct 28 2003 - 08:37:40 MST)
  • vl2mv issue (Mon Oct 27 2003 - 08:10:53 MST)
• Fabio
  • vis and edif (Mon Jul 26 2004 - 06:20:54 MDT)
  • edif2blif (Mon Jul 26 2004 - 05:52:24 MDT)
  • bounded_model_check and counterexample (Sat Jul 10 2004 - 01:21:35 MDT)
  • print cnf of flattened network (Mon Jul 05 2004 - 14:34:07 MDT)
  • bmc and "formula undecided" (Sun Jul 04 2004 - 10:35:09 MDT)
  • ltl formula (part 2) (Tue Jun 22 2004 - 15:49:57 MDT)
  • ltl formula (Tue Jun 22 2004 - 15:45:44 MDT)
  • help (Mon Jun 21 2004 - 10:26:34 MDT)
• Fabio Somenzi
  • Re: your mail (Tue Jan 06 2009 - 18:35:14 MST)
  • Re: help: vl2mv-2.1 installation (Tue Jan 06 2009 - 18:24:41 MST)
  • Re: Problem with Glu array on ia64 (Fri Oct 31 2008 - 15:48:58 MDT)
  • Re: Multi-threading in Glu/Cudd (Thu Dec 20 2007 - 17:56:13 MST)
  • Re: Multi-threading in Glu/Cudd (Thu Dec 20 2007 - 15:54:02 MST)
  • Re: Hello VIS users (Thu Nov 01 2007 - 08:32:01 MDT)
  • RE: setting the Then/Else pointers (Mon Sep 24 2007 - 08:50:21 MDT)
  • Re: how to get the top variable in DdManager? (Sat May 05 2007 - 11:04:46 MDT)
  • Re: Can't run check_invariant -A4 (The puresat algorithm) (Fri Mar 30 2007 - 18:53:08 MDT)
  • Re: Model checking with CTL (Wed Mar 21 2007 - 17:59:16 MDT)
  • Re: Model checking with CTL (Wed Mar 21 2007 - 17:57:17 MDT)
  • Re: BDD node behaviour (Sun Dec 10 2006 - 19:10:54 MST)
  • Re: BDD node behaviour (Sun Dec 10 2006 - 18:33:30 MST)
  • Re: Problem with a mux description in Verilog (Sat Dec 02 2006 - 13:47:04 MST)
  • Re: segmentation fault vl2mv (Tue Nov 28 2006 - 13:03:41 MST)
  • re: a question about building bdd tree with CU Decision Diagram Package (Thu Oct 19 2006 - 08:48:05 MDT)
  • Re: CTL formulae with Primary Inputs in precondition part of it. (Mon Oct 09 2006 - 07:55:38 MDT)
  • Re: vl2mv with cygwin (Sun Oct 30 2005 - 12:34:42 MST)
  • Re: Finding a Variable Ordering (Wed Jun 22 2005 - 20:31:04 MDT)
  • Re: Simulating verilog HDL using VIS (Sat May 07 2005 - 08:19:08 MDT)
  • Re: why check_invariant can be much faster than model_check for same property? (Fri Apr 29 2005 - 13:00:09 MDT)
  • Re: status of vis (Thu Apr 28 2005 - 13:20:13 MDT)
  • Re: A question about bounded model checking (Mon Apr 18 2005 - 14:01:27 MDT)
  • Re: help: Cannot perform flatten_hierarchy Table a._n3345 is not deterministic (Tue Apr 12 2005 - 12:53:45 MDT)
  • Re: Silly question about compilation (Wed Feb 16 2005 - 14:18:19 MST)
  • Re: Cudd_OverApprox & Cudd_UnderApprox (Fri Dec 10 2004 - 08:34:14 MST)
  • Re: About coverage estimation of SMC (Fri Dec 03 2004 - 04:10:05 MST)
  • Re: how to turn off reachabilty analysis in model checking(without guided search)? (Thu Nov 18 2004 - 23:20:38 MST)
  • RE: About Questions of functions ttransferring a MDD to BDD in VIS --what I really want to do. (Mon Oct 18 2004 - 11:07:40 MDT)
  • Re: Any function that can transfer a MDD to BDD in VIS? (Mon Oct 18 2004 - 10:47:28 MDT)
  • Re: Any function that can transfer a MDD to BDD in VIS? (Mon Oct 18 2004 - 10:35:58 MDT)
  • Re: changing cudd_zddCountMinterms (Mon Oct 11 2004 - 17:36:23 MDT)
  • Re: I cannot read blif file (Mon Oct 11 2004 - 17:30:30 MDT)
  • Re: I cannot read blif file (Fri Oct 08 2004 - 10:37:25 MDT)
  • Re: I cannot read blif file (Thu Oct 07 2004 - 10:45:27 MDT)
  • Re: computing g*h (Thu Sep 30 2004 - 09:48:45 MDT)
  • Re: changing DdNode structure (Mon Sep 27 2004 - 11:22:49 MDT)
  • Re: vis segfault, Cudd_bddPickOneMinterm (Thu Sep 09 2004 - 11:24:07 MDT)
  • Re: valid input generation in seq_verify (Tue Aug 24 2004 - 10:39:23 MDT)
  • Re: help need on using Cudd_FirstCube and Cudd_NextCube (Tue Aug 17 2004 - 15:03:40 MDT)
  • Re: vis error: "Could not find node corresponding to the name" (Thu Aug 12 2004 - 11:38:57 MDT)
  • Re: print cnf of flattened network (Mon Jul 05 2004 - 15:40:24 MDT)
  • Re: bmc and "formula undecided" (Mon Jul 05 2004 - 15:35:10 MDT)
  • Re: ltl formula (Tue Jun 22 2004 - 15:55:39 MDT)
  • Re: Is there another way to walk around problem "Node ** is not driven only by latches and constants?" (Mon Jun 21 2004 - 17:17:33 MDT)
  • Re: dump to blif (Thu Jun 03 2004 - 17:18:03 MDT)
  • Re: dump to blif (Thu Jun 03 2004 - 15:44:44 MDT)
  • Re: trying to build vis2.0 on OS X (Mon May 17 2004 - 21:33:12 MDT)
• fabio\.marcone\_at_libero\.it
  • tab key and arrow keys (Sun Oct 10 2004 - 04:49:20 MDT)
• Fang Wang
  • A problem with ltl-model-checking (Sat Mar 27 2004 - 08:26:05 MST)
  • reductions in LTL model checking (Tue Jan 20 2004 - 14:45:14 MST)
  • how to represent 16-bit inputs (Mon Nov 03 2003 - 08:48:46 MST)
• Fazela Vohra
  • Re: Benchmarks question (Thu Jun 15 2006 - 10:10:41 MDT)
• Fei He
  • Re: Fw: (by sunke2008@tom.com)I can't get VIS (Thu Jun 26 2008 - 23:01:02 MDT)
• Flavio M. De Paula
  • Conditional branch in Verilog generating wrong BDD in VIS (Fri Jun 02 2006 - 23:05:38 MDT)
  • Extra BDD nodes being created. Is this a bug? (Tue May 30 2006 - 17:53:43 MDT)
• Florian Pigorsch
  • BLIF-MV to BLIF (Wed Jul 12 2006 - 05:14:30 MDT)
• Francisco Javier Torres Valle
  • Re: hello (Tue Jan 13 2004 - 18:51:45 MST)
• Fritz Thorpe
  • Finally, an affiliate program that works! (Sat Mar 27 2004 - 22:24:16 MST)
• Gaurav Agarwal
  • why check_invariant can be much faster than model_check for same property? (Fri Apr 29 2005 - 12:20:58 MDT)
• gepolv
  • how to get the top variable in DdManager? (Sat May 05 2007 - 07:00:12 MDT)
  • Re: anybody send me a copy of old version of cudd or just send me a link (Tue Apr 17 2007 - 20:28:55 MDT)
  • anybody send me a copy of old version of cudd or just send me a link (Mon Apr 16 2007 - 20:40:50 MDT)
  • mv2blif: a tool transforms bilfmv to blif (Sun Dec 17 2006 - 06:34:07 MST)
  • i made a tool that transforms blifmv 2 blif (Wed Dec 13 2006 - 19:49:30 MST)
  • bug about vl2mv! (Sun May 14 2006 - 00:09:36 MDT)
  • bug about vl2mv (Sat May 13 2006 - 07:52:24 MDT)
  • bug about vl2mv (Wed May 10 2006 - 23:11:58 MDT)
• goparaju_at_engr.siu.edu
  • (no subject) (Mon Apr 25 2005 - 11:06:08 MDT)
• Gordon Zhang
  • simple front-end bug (Fri Apr 09 2004 - 13:10:56 MDT)
• Graeme Cunningham
  • RE: I cannot read blif file (Thu Oct 07 2004 - 09:48:40 MDT)
• gsreddy_at_cedt.iisc.ernet.in
  • Re: bug about vl2mv! (Sun May 14 2006 - 02:28:53 MDT)
• guojian
  • Re:PSL syntax in VIS (Thu Nov 06 2008 - 16:57:58 MST)
  • Re:Fw: (by sunke2008@tom.com)I can't get VIS (Thu Jun 26 2008 - 00:09:30 MDT)
• Hamid Shojai
  • Re: VIS Installation for Windows ! (Tue Oct 28 2003 - 05:06:29 MST)
  • Re: VIS Installation for Windows ! (Tue Oct 28 2003 - 02:02:21 MST)
  • Re: how can i download mdd and bdd package you use (Sun Oct 26 2003 - 10:17:27 MST)
• hartmut wittke
  • input buffering (Mon Dec 13 2004 - 10:47:14 MST)
• Heiner Lauterbach
  • VHDL to BLIF issue (LEON2) (Mon Nov 20 2006 - 05:35:03 MST)
• hmf_at_inescporto.pt
  • CuDD: subsets and equivalence + compile error (Mon Jul 21 2008 - 05:10:49 MDT)
• Hugo Ferreira
  • CuDD: Cudd_bddPickOneCube (Tue Nov 04 2008 - 13:38:17 MST)
• Huy Lam
  • RE: verilog to blif convert (Wed May 09 2007 - 20:25:21 MDT)
  • Model checking with CTL (Wed Mar 21 2007 - 16:41:43 MDT)
• Ian Harris
  • Re: Is LTL a subset of ACTL*? (Mon Apr 25 2005 - 14:45:34 MDT)
• Ilya Shlyakhter
  • cudd 2.4.0 and vis 2.0 (Thu May 20 2004 - 13:38:21 MDT)
• Jaideep Ramachandran
  • help: vl2mv-2.1 installation (Fri Jan 02 2009 - 03:02:49 MST)
• Jaime Washington
  • Here's a new twist on Affiliate programs (Tue Feb 17 2004 - 14:17:04 MST)
• jguo_at_sei.ecnu.edu.cn
  • vis for psl (Mon Nov 05 2007 - 18:03:55 MST)
  • vis for psl (Mon Nov 05 2007 - 00:08:02 MST)
• Jimmy
  • blif2cnf? (Tue Jun 06 2006 - 19:14:42 MDT)
• Jiten Das
  • Re: help for installing vl2mv (Fri Feb 20 2009 - 03:09:53 MST)
• Joan Bravo
  • Your opinions are worth money (Mon Apr 05 2004 - 05:02:11 MDT)
• Joshi Saurabh
  • circuit minimization through vis? (Mon Jun 27 2005 - 04:27:16 MDT)
  • Re: vis problem (Sun Jun 26 2005 - 02:27:37 MDT)
  • problem with vis (Sat Jun 25 2005 - 11:37:13 MDT)
• Junbeom Yoo
  • Problem with "seq_verify" counter-example trace. (Wed Nov 10 2004 - 04:49:13 MST)
  • Error trace(counter example) generation (Thu Nov 04 2004 - 22:15:54 MST)
  • valid input generation in seq_verify (Tue Aug 24 2004 - 05:50:32 MDT)
• Junkie Dolphin
  • A question about bounded model checking (Tue Apr 19 2005 - 13:43:00 MDT)
  • Silly question about compilation (Wed Feb 16 2005 - 13:22:54 MST)
• junkie\.dolphin\_at_libero\.it
  • ...! (Wed Apr 13 2005 - 09:35:56 MDT)
  • undecipherable parse error in LTL formula (Wed Apr 13 2005 - 09:31:24 MDT)
• K.L. Man
  • Re: genlib format description (Mon Jun 02 2008 - 06:55:27 MDT)
• Kanisha Gundogdu
  • POTENTIAL SPAM: Today's QCPC prices (Thu Feb 08 2007 - 12:29:31 MST)
• kannan sa
  • VIS Installation Help (Wed Jan 31 2007 - 07:23:52 MST)
• Kefei Wei
  • Re: verilog to blif convert (Wed May 09 2007 - 20:12:24 MDT)
  • verilog to blif convert (Wed May 09 2007 - 10:22:22 MDT)
• Kelvin Lwin
  • core dump for collapse_child (Tue Apr 25 2006 - 20:30:13 MDT)
• Korey LaMar Sewell
  • vis error: "Could not find node corresponding to the name" (Thu Aug 12 2004 - 04:59:26 MDT)
• Kusum Lata
  • problem with vl2mv-2.1 ! (Tue Apr 18 2006 - 10:53:47 MDT)
  • Re: Simulating verilog HDL using VIS (Sun Apr 16 2006 - 03:24:55 MDT)
• kwzbxilx
  • POTENTIAL SPAM: Timely Buying 0pportunity for this SmallCap? AETR . pk (Mon Sep 11 2006 - 01:25:25 MDT)
• lara d'amore
  • Problem with a mux description in Verilog (Sat Dec 02 2006 - 13:29:27 MST)
  • Segmentation fault (Wed Aug 09 2006 - 05:27:41 MDT)
• Li, Lun
  • Is the SAT_ALL algorithm published in DAC'05 implemented in current VIS release? (Tue Aug 30 2005 - 09:18:43 MDT)
  • Help on error "# BMC: SAT Solver failed, try again" when runing arbiter example (Fri Aug 26 2005 - 11:56:32 MDT)
  • how to turn off reachabilty analysis in model checking(without guided search)? (Thu Nov 18 2004 - 22:06:32 MST)
  • Could VIS be used for under-approximation in reachabilibity analysis? (Thu Oct 21 2004 - 09:54:56 MDT)
  • RE: About Questions of functions ttransferring a MDD to BDD in VIS --what I really want to do. (Mon Oct 18 2004 - 07:45:01 MDT)
  • Any function that can transfer a MDD to BDD in VIS? (Sun Oct 17 2004 - 13:13:54 MDT)
  • when using Cudd_foreachCube to get a cube, what the order do the vars in cube follow, index or current level? (Tue Sep 07 2004 - 08:21:43 MDT)
  • help need on using Cudd_FirstCube and Cudd_NextCube (Tue Aug 17 2004 - 13:19:58 MDT)
  • Is there another way to walk around problem "Node ** is not driven only by latches and constants?" (Mon Jun 21 2004 - 13:55:51 MDT)
• Lidia Kessler
  • POTENTIAL SPAM: Boost your satisfaction (Wed Mar 07 2007 - 09:40:17 MST)
• lo wenn
  • Question about non-blocking assignment to partial verctor (Tue Sep 13 2005 - 05:48:50 MDT)
• Long, Jiang
  • RE: setting the Then/Else pointers (Sun Sep 23 2007 - 23:00:49 MDT)
• luca gambardella
  • Cudd_OverApprox & Cudd_UnderApprox (Fri Dec 10 2004 - 03:31:21 MST)
  • building zdd (Mon Oct 18 2004 - 05:51:22 MDT)
  • count_zdddoublestep (Tue Oct 12 2004 - 10:11:44 MDT)
  • changing cudd_zddCountMinterms (Mon Oct 11 2004 - 09:12:30 MDT)
  • compiling CUDD (Fri Oct 08 2004 - 06:37:39 MDT)
  • computing g*h (Thu Sep 30 2004 - 02:56:12 MDT)
  • computing g*h (Thu Sep 30 2004 - 02:44:20 MDT)
  • changing DdNode structure (Mon Sep 27 2004 - 10:12:51 MDT)
• madhusudhan_at_iitg.ac.in
  • problem in installing vl2mv 2.0 (Wed Apr 08 2009 - 01:05:39 MDT)
• majid nabi
  • CTL formulae with Primary Inputs in precondition part of it. (Mon Oct 09 2006 - 05:04:19 MDT)
  • Model Checking (Sun Aug 27 2006 - 00:57:00 MDT)
  • BDD Restriction (Sat Aug 19 2006 - 05:20:23 MDT)
• Markus Wedler
  • README.vl2mv (Tue Sep 05 2006 - 05:04:56 MDT)
• Mc Chen
  • RE: VIS Installation Help (Wed Jan 31 2007 - 08:02:14 MST)
• metalliqaz_at_fastmail.fm
  • Re: dump to blif (Thu Jun 03 2004 - 17:06:19 MDT)
  • dump to blif (Thu Jun 03 2004 - 13:33:38 MDT)
• Michael Frederick
  • Re: VHDL to BLIF issue (LEON2) (Fri Mar 23 2007 - 11:06:30 MDT)
• Michael Sumato
  • Re: URGENT CALL FOR HELP (Sun Jul 22 2007 - 04:56:54 MDT)
• Mike Lyon
  • POTENTIAL SPAM: Melt away fat easily (Mon Mar 19 2007 - 12:56:24 MDT)
• milir
  • Cube detection using BDDs (Tue Apr 26 2005 - 09:59:14 MDT)
• Mohammad.R Kakoee
  • "Deadlock Detection ? " (Tue Nov 21 2006 - 00:38:13 MST)
  • Re: VIS installation Problem (Thu Jun 29 2006 - 02:11:29 MDT)
  • Re: VIS installation Problem (Thu Jun 29 2006 - 02:03:50 MDT)
  • Re: Dealing with BLIF files (Wed Jun 28 2006 - 08:47:08 MDT)
  • Re: Dealing with BLIF files (Mon Jun 26 2006 - 23:26:52 MDT)
  • Re: Simulating verilog HDL using VIS (Sun Apr 16 2006 - 23:47:16 MDT)
• Moiz Khan
  • blif to verilog converter ? (Wed Jun 07 2006 - 11:50:27 MDT)
  • RE: ISCAS2BLIF (Wed Jun 22 2005 - 11:50:41 MDT)
  • RE: Graph traversal (Thu Sep 09 2004 - 14:26:31 MDT)
  • Graph traversal (Thu Sep 09 2004 - 12:05:31 MDT)
• Mojtaba Vatani
  • Re: VIS (Sat Jun 24 2006 - 05:57:33 MDT)
• Muralidaran Vijayaraghavan
  • Synthesis into 4-input LUTs (Sun Apr 30 2006 - 04:35:01 MDT)
• Najeeb K
  • smv cadence (Sat Oct 28 2006 - 02:02:28 MDT)
  • vis problem (Sun Jun 26 2005 - 00:59:28 MDT)
  • reconvergence algorithm (Sat Jun 25 2005 - 07:17:33 MDT)
  • ISCAS-85 to blif(Techmapped) conversion (Thu Jun 23 2005 - 01:31:19 MDT)
  • ISCAS to BLIF (VPR) (Wed Jun 22 2005 - 10:51:59 MDT)
  • ISCAS2BLIF (Wed Jun 22 2005 - 10:49:44 MDT)
• Nicole Poe
  • Incredible Software Deals unruly lebanon surjection (Tue Jun 22 2004 - 22:48:28 MDT)
• Niklas Een
  • Re: Blif-mv to Kripke? (Mon Aug 09 2004 - 02:11:47 MDT)
  • Reachability information (Sat Nov 08 2003 - 02:24:50 MST)
• Nir Piterman
  • Re: Problem with Glu array on ia64 (Fri Oct 31 2008 - 16:27:33 MDT)
  • Problem with Glu array on ia64 (Wed Oct 29 2008 - 16:28:17 MDT)
• Osama Neiroukh
  • VIS and "AllSAT" (Fri Aug 26 2005 - 08:48:10 MDT)
• Paan Waala
  • Comparing 2 variables in CUDD (Fri Mar 20 2009 - 02:48:40 MDT)
  • Re: Hello VIS users (Thu Nov 01 2007 - 12:01:28 MDT)
• Pejman Lotfi-Kamran
  • Re: VIS (Sat Jun 24 2006 - 06:43:08 MDT)
  • VIS (Sat Jun 24 2006 - 02:13:07 MDT)
• Pongstorn Maidee
  • (no subject) (Mon Dec 11 2006 - 21:59:12 MST)
  • Re: BDD node behaviour (Sun Dec 10 2006 - 18:50:09 MST)
  • BDD node behaviour (Sun Dec 10 2006 - 16:01:18 MST)
• prasad
  • BLIF to Verilog converter (Sat Apr 08 2006 - 13:15:14 MDT)
• Prasad AVSS
  • VL2MV output (Sun Oct 30 2005 - 20:53:53 MST)
  • vl2mv with cygwin (Sun Oct 30 2005 - 10:28:18 MST)
• Qiang Qiang (Katherine)
  • Questions on BMC feature (Sat Apr 02 2005 - 11:24:13 MST)
• Quer Stefano
  • Re: A problem when install (Tue May 30 2006 - 07:07:49 MDT)
• R. Manitra
  • Yet another read_blif problem (Tue Jul 11 2006 - 02:39:12 MDT)
  • Re: I cannot read blif file (Wed Oct 13 2004 - 07:04:23 MDT)
  • Re: I cannot read blif file (Fri Oct 08 2004 - 06:47:02 MDT)
  • I cannot read blif file (Thu Oct 07 2004 - 09:37:39 MDT)
• Rajsekhar Adapa
  • Finding a Variable Ordering (Wed Jun 22 2005 - 18:46:35 MDT)
• Ravi Shankar Kolli
  • Re: VIS installation Problem (Fri Jun 30 2006 - 10:51:46 MDT)
  • VIS installation Problem (Wed Jun 28 2006 - 12:18:15 MDT)
  • Re: Dealing with BLIF files (Tue Jun 27 2006 - 08:43:10 MDT)
  • Dealing with BLIF files (Mon Jun 26 2006 - 14:32:02 MDT)
• Ray, Rajarshi
  • Regarding including libraries in VHDL (Wed Mar 17 2004 - 11:16:33 MST)
  • VIS Installation for Windows ! (Mon Oct 27 2003 - 16:09:25 MST)
• Reginald Shields
  • Own a Home? Get Cash Out - Rates are low! (Mon Apr 12 2004 - 04:41:45 MDT)
• Ricardo Cunha
  • multiple valued synthesis (Wed Jun 13 2007 - 13:44:45 MDT)
• Robert
  • Re: Simulating verilog HDL using VIS (Sat May 07 2005 - 14:15:24 MDT)
  • Simulating verilog HDL using VIS (Sat May 07 2005 - 00:09:23 MDT)
• Roderick Bloem
  • Re: how can i download mdd and bdd package you use (Thu Oct 23 2003 - 02:20:18 MDT)
• Roopak Sinha
  • Re: NuSMV explicit state model checking (Thu Aug 04 2005 - 20:16:45 MDT)
  • NuSMV explicit state model checking (Thu Aug 04 2005 - 16:36:35 MDT)
  • (no subject) (Thu Jul 28 2005 - 16:19:16 MDT)
  • Re: Is LTL a subset of ACTL*? (Mon Apr 25 2005 - 15:51:28 MDT)
  • Is LTL a subset of ACTL*? (Mon Apr 25 2005 - 14:00:53 MDT)
  • Blif-mv to Kripke? (Sun Aug 08 2004 - 20:48:41 MDT)
• samir
  • Re: Hello VIS users (Thu Nov 01 2007 - 22:07:03 MDT)
• Sandeep Srinivasa
  • CVS read access for CUDD (Fri Nov 02 2007 - 01:11:07 MDT)
• Saqib Bin Sohail
  • Re: help for installing vl2mv (Fri Feb 20 2009 - 02:48:21 MST)
  • Re: your mail (Mon Jan 05 2009 - 16:51:32 MST)
• seetha_at_cse.iitb.ac.in
  • VHDL frontend (Sat Feb 12 2005 - 05:14:34 MST)
• sekhar a
  • Issue with CUDD_MAXINDEX (Thu May 11 2006 - 15:04:02 MDT)
  • Increase in the value of CUDD_MAXINDEX in Cudd Package (Mon May 01 2006 - 12:48:05 MDT)
• Shaker Sarwary
  • RE: changing DdNode structure (Mon Sep 27 2004 - 12:03:02 MDT)
• Shaun Feng
  • Re: non-blocking assignment for vl2mv (question) (Mon Jan 12 2009 - 14:43:06 MST)
  • Re: your mail (Fri Jan 09 2009 - 13:39:28 MST)
  • Re: your mail (Mon Jan 05 2009 - 21:25:31 MST)
  • Re: verilog to blif convert (Wed May 09 2007 - 22:25:49 MDT)
  • RE: verilog to blif convert (Wed May 09 2007 - 22:07:51 MDT)
  • Re: VHDL to BLIF issue (LEON2) (Tue Mar 27 2007 - 14:53:21 MDT)
  • Re: VHDL to BLIF issue (LEON2) (Mon Nov 20 2006 - 09:32:00 MST)
  • Re: Dealing with BLIF files (Wed Jun 28 2006 - 11:02:50 MDT)
  • Re: bug about vl2mv (Sun May 14 2006 - 22:54:52 MDT)
  • Re: Synthesis into 4-input LUTs (Sun Apr 30 2006 - 11:37:33 MDT)
  • Re: NuSMV explicit state model checking (Thu Aug 04 2005 - 17:25:23 MDT)
  • Re: ISCAS2BLIF (Wed Jun 22 2005 - 11:33:57 MDT)
  • Re: Verilog to dot (Tue Oct 26 2004 - 22:29:34 MDT)
• Shrirang Yardi
  • Re: Simulating verilog HDL using VIS (Sun Apr 16 2006 - 10:22:27 MDT)
• siddheshwar rathi
  • Re: Graph traversal (Thu Sep 09 2004 - 13:32:28 MDT)
• Sk Golam Sarowar Hossain
  • Re: genlib format description (Mon Jun 02 2008 - 21:50:14 MDT)
• Sobeeh A. Almukhaizim
  • SPFDs in VIS (Fri Dec 02 2005 - 16:05:23 MST)
• Solaiman Rahim
  • Re: I cannot read blif file (Wed Oct 13 2004 - 07:06:47 MDT)
  • Re: I cannot read blif file (Thu Oct 07 2004 - 10:49:49 MDT)
  • Re: I cannot read blif file (Thu Oct 07 2004 - 09:59:23 MDT)
• Srikanth Reddy G
  • roblem with vis (Fri Sep 02 2005 - 00:32:29 MDT)
  • problem with vis (Thu Sep 01 2005 - 10:37:46 MDT)
• Stella Napier
  • get the better job - buy a diploma today (Sat Mar 13 2004 - 15:00:33 MST)
• Sumit Ahuja
  • problem with init_verify (Fri Apr 03 2009 - 17:22:53 MDT)
• Sunil Rafeeque K.P.
  • Re: Can't run check_invariant -A4 (The puresat algorithm) (Fri Mar 30 2007 - 19:31:01 MDT)
  • Re: Can't VIS a simple Verilog (Wed Mar 28 2007 - 00:00:35 MDT)
• Susan Knight
  • This is a neat idea (Wed Apr 14 2004 - 16:19:00 MDT)
• Swarat Chaudhuri
  • (no subject) (Tue Mar 02 2004 - 14:26:13 MST)
  • Variable names for BDD indices (Sun Sep 21 2003 - 16:52:12 MDT)
• Syed Shazli
  • Error in writing out to blif (Sat Jun 02 2007 - 06:49:04 MDT)
  • Error in reading verilog (Sun May 27 2007 - 05:11:22 MDT)
  • using for ALL-SAT (Fri May 11 2007 - 06:19:25 MDT)
• Thad Hamilton
  • About Your M[o]rtgage application (Thu Jun 03 2004 - 00:40:45 MDT)
• Thomas Wahl
  • From Verilog to SMV (Sun Mar 26 2006 - 22:25:33 MST)
• Tobe Toben
  • vis segfault, Cudd_bddPickOneMinterm (Wed Sep 08 2004 - 13:16:33 MDT)
• Tobias Pampel
  • genlib format description (Wed May 14 2008 - 03:48:29 MDT)
• Tom Bienmueller
  • Calling check_inv several times (Fri Jul 16 2004 - 09:26:39 MDT)
• Touqeer Azam
  • vis installation error (Tue Jun 24 2008 - 09:26:56 MDT)
• Truman Cardenas
  • get the better job - buy a diploma today (Sun Mar 28 2004 - 09:20:41 MST)
• tunlee_at_hotmail.com
  • Re: Simulating verilog HDL using VIS (Sat May 07 2005 - 04:54:11 MDT)
  • Re: Ask for the referenced paper "Efficient Formal Design Verification: Structure+Algorithm" (Sat Dec 04 2004 - 05:58:37 MST)
• tvfjfjw siagiinll
  • Nothing like it AETR (Sun Sep 10 2006 - 10:48:01 MDT)
• U.Balaji
  • Re: Dealing with BLIF files (Wed Jun 28 2006 - 22:08:28 MDT)
• U.S. Bank
  • ReguIar US Bank verification of the accounts. (Sun Jul 25 2004 - 15:30:25 MDT)
• Varun Varshney
  • Problems in flatten_hierarchy (Mon Apr 12 2004 - 08:42:00 MDT)
• Velma Seymour
  • Congrats, You Qualify for our program (Thu Jun 03 2004 - 06:21:49 MDT)
• vijay kumar
  • Hi . . (Sun Apr 16 2006 - 11:50:10 MDT)
• Vladimir Sipos
  • ltl_to_aut (Tue Mar 23 2004 - 14:22:46 MST)
• Wael Badawy
  • IWSOC-Invitation (Sun Oct 31 2004 - 22:04:40 MST)
• wangc
  • Re: hello (Tue Jan 13 2004 - 19:05:59 MST)
• wanxia qu
  • who has dot tool? Can I share it? (Thu Aug 23 2007 - 20:53:13 MDT)
• Waseem Muhammad
  • PSL syntax in VIS (Thu Nov 06 2008 - 07:24:21 MST)
  • How to get vl2mv 2.0 (Thu Aug 14 2008 - 04:17:09 MDT)
  • Latch inference in VIS for Verilog models (Tue Aug 12 2008 - 06:10:54 MDT)
  • Re: vis installation error (Tue Jun 24 2008 - 09:48:18 MDT)
  • Re: Help !! VIS Error !! (Mon Jun 23 2008 - 11:33:58 MDT)
  • Re: VIS ERROR -- NEED HELP !! (Wed Jun 11 2008 - 02:17:10 MDT)
  • Hello VIS users (Thu Nov 01 2007 - 07:14:39 MDT)
• William Hung
  • Root cause of VIS compilation problems is due to flex version differences (Tue Nov 06 2007 - 17:51:03 MST)
  • Re: Logic bug in the VIS GRAB package? (Mon Oct 15 2007 - 08:42:48 MDT)
  • Logic bug in the VIS GRAB package? (Sun Oct 14 2007 - 23:20:09 MDT)
• Xingwen XU
  • RE: vl2mv (Fri Nov 04 2005 - 20:48:20 MST)
  • help: Cannot perform flatten_hierarchy Table a._n3345 is not deterministic (Sun Jan 23 2005 - 22:43:55 MST)
  • RE: Ask for the referenced paper "Efficient Formal Design Verification: Structure+Algorithm" (Sat Dec 04 2004 - 07:19:06 MST)
• Xingwen\(Steven\) XU
  • RE: input buffering (Tue Dec 14 2004 - 08:14:10 MST)
• XU Xing Wen
  • Ask for the referenced paper "Efficient Formal Design Verification: Structure+Algorithm" (Sat Dec 04 2004 - 01:11:34 MST)
  • RE: About coverage estimation of SMC (Fri Dec 03 2004 - 23:20:35 MST)
  • About coverage estimation of SMC (Fri Dec 03 2004 - 00:45:15 MST)
• Yabin Ye
  • Call For Workshop Ideas co-located with CHINACOM2006 (Tue May 23 2006 - 03:16:58 MDT)
  • CHINACOM2006 deadline has been extended to May 15th, 2006 (Mon May 01 2006 - 06:57:22 MDT)
  • The deadline of CHINACOM2006 is only 10 days away (Thu Apr 20 2006 - 01:52:39 MDT)
  • CHINACOM2006 First Call For Papers (Thu Feb 09 2006 - 08:45:39 MST)
• yg2153_at_columbia.edu
  • segmentation fault vl2mv (Mon Nov 27 2006 - 10:01:00 MST)
• Yimin Zhang
  • how to construct the BDD with many dc function (Tue Nov 04 2003 - 06:11:29 MST)
• yongjian li
  • blif_mv-to-blif/vis example-counter (Fri Nov 02 2007 - 07:00:25 MDT)
  • blif-mv to blif /counter example (Sun Nov 04 2007 - 01:42:41 MST)
• Youngsik Kim
  • Re: vis problem (Sun Jun 26 2005 - 17:05:01 MDT)
• Zaher S Andraus
  • Re: Can't run check_invariant -A4 (The puresat algorithm) (Fri Mar 30 2007 - 16:27:37 MDT)
  • Can't run check_invariant -A4 (The puresat algorithm) (Fri Mar 30 2007 - 08:57:54 MDT)
  • Can't VIS a simple Verilog (Sun Mar 25 2007 - 09:56:48 MDT)
  • Verilog -> CNF (Thu Mar 10 2005 - 20:50:38 MST)
  • Re: Verilog to dot (Tue Oct 26 2004 - 22:39:47 MDT)
  • Verilog to dot (Tue Oct 26 2004 - 19:18:04 MDT)
  • Re: help (Fri Jul 09 2004 - 21:03:00 MDT)
  • compilation problem, and 2 general questions (Sun Apr 11 2004 - 23:07:31 MDT)
  • Performace question (Fri Apr 09 2004 - 14:51:39 MDT)
  • Incomprehensive error message (Thu Apr 08 2004 - 21:39:25 MDT)
  • Re: hello (Tue Jan 13 2004 - 19:03:54 MST)
• Zhao, Yang
  • Re: verilog to blif convert (Wed May 09 2007 - 19:06:49 MDT)
  • Re: About backward reachable analysis (Tue May 08 2007 - 18:48:13 MDT)
  • About backward reachable analysis (Sun May 06 2007 - 04:26:05 MDT)
  • Backward Reachability Analysis (Wed Apr 18 2007 - 04:58:48 MDT)
  • Interface between vl2mv and MVSIS (Thu Mar 01 2007 - 00:55:38 MST)
• Zhaoyang
  • Re: Vis installation problems on Solaris (Mon Jun 05 2006 - 21:01:35 MDT)
• Zhe Hu
  • non-blocking assignment for vl2mv (question) (Mon Jan 12 2009 - 10:57:11 MST)
• zhurui
  • look for a tool (Mon Mar 02 2009 - 20:48:39 MST)
  • help for installing vl2mv (Sat Feb 21 2009 - 01:49:17 MST)
• Zijiang (James) Yang
  • Re: hello (Tue Jan 13 2004 - 19:17:22 MST)
  • hello (Tue Jan 13 2004 - 18:45:31 MST)
• 曹 正寰
  • how can I see the MDD graph? (Mon Jun 26 2006 - 03:16:21 MDT)
  • how can I see the MDD graph? (Mon Jun 26 2006 - 01:48:18 MDT)
• 麻帡
  • Re: anybody send me a copy of old version of cudd or just send me a link (Mon Apr 16 2007 - 21:54:57 MDT)
• 富有生活_at_mx3.Colorado.EDU
  • 想為家庭多增加收入! (Wed Sep 22 2004 - 20:20:22 MDT)
• 窇恅疏
  • Re: a question about building bdd tree with CU Decision Diagram Package (Wed Oct 18 2006 - 08:31:04 MDT)
• 梊栠
  • Help for preimage computation (Fri Jun 23 2006 - 04:23:15 MDT)
  • Re: Vis installation problems on Solaris (Tue Jun 06 2006 - 19:32:37 MDT)
  • A problem when install (Mon May 29 2006 - 10:08:02 MDT)

Last message date: Mon Apr 13 2009 - 09:23:35 MDT
Archived on: Mon Apr 13 2009 - 09:23:38 MDT

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