non-blocking assignment for vl2mv (question)

From: Zhe Hu (iamhuzhe_at_gmail.com)
Date: Mon Jan 12 2009 - 10:57:11 MST

Hi,
I tried to use a simple non-blocking assignment (e.g. counter <= counter+ 1)
within an always block in my verilog code.

I can read_verilog (in VIS), but can't write_blif. But if I change (counter
<= counter + 1) to (counter = counter + 1), everything seems to work.

Is non-blocking assignment supported by vl2mv?

Thanks in advance,
Hu Zhe

P.S.
similar question was asked in 2005, but I can't find the reply post.

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