From: prasad (prasadc_at_uaeu.ac.ae)
Date: Sat Apr 08 2006 - 13:15:14 MDT
Hi all.
I am working on Binary Decision Diagrams and I use ISCAS benchmarks in BLIF
circuits to validate our results using CUDD package. We need to convert the
BLIF ( example C880.blif file) to Verilog format for our research work.
Please be good enough to provide us any link or URL where we can find a tool
( I don't mind whether its WINDOWs or Linux based) which can do the
conversion.
Thanks in advance
Chandana prasad
UAE University
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