Re: circuit minimization through vis?

From: Adnan Aziz (adnan_at_ece.utexas.edu)
Date: Mon Jun 27 2005 - 15:54:18 MDT


for synthesis you should be using sis not vis, period.

i have a sis built on redhat 9.0 on my local machine, wasn't that big a
deal to compile - the problem is likely with the paths in the makefile,
make sure they are set right. (you may have to redefine some of the
defines in the header files, but they are pretty obvious.) it's not that
big a deal to tinker with the makefile/headers, just comment what you do,
if it compiles, it's unlikely that your hacks will affect functionality.

also use make -i to continue the compile in the presence of errors, that
way you can get more done in each of the compile/edit cycle.

cheers,
adnan

  -------------------------------------------
  Adnan Aziz, Dept. of Elect. and Comp. Eng.,
  The University of Texas, Austin TX, 78712
  1 (512) 475-9774 www.ece.utexas.edu/~adnan
  -------------------------------------------

On Mon, 27 Jun 2005, Joshi Saurabh wrote:

> Hi all,
> Does anybody have any idea whether is it possible to perform
> circuit minimization using VIS? how?
>
> or is it possible to do the same with mvsis?
>
> I have sis-1.2 source. I am trying to compile it on readhat-9, i686
> machine and give me a very loooong list of errors :-(.
>
> please help me,
>
> Thanks in advance,
> Rgds,
> saurabh
>
>
> --
> Saurabh Joshi
> Project RA (CFDVS),
> Dept of CSE,
> IIT Bombay -400076
>



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