From: R. Manitra (rmanitra_at_ac.upc.es)
Date: Wed Oct 13 2004 - 07:04:23 MDT
I removed all of the CRC_OUT_*_* outputs in the file s35932.blif and I
could read it correctly even without init_verify.
After that, I tried to read other files without init_verify and it
worked as well.
So, if that's the case, maybe the command init_verify is necessary only
when you run vis for the very first time.
I will send to you anyway the files that I tried to read at the very
Thanks again for your help.
On Tue, 2004-10-12 at 01:30, Fabio Somenzi wrote:
> Thanks for sending your blif file for s35932. The message you got is
> due to the fact that none of the CRC_OUT_*_* outputs declared in the
> file header are actually driven by any gate. Vis won't let you have
> floating outputs: Each signal must be driven unless it is declared as
> primary input.
> Once those output declarations are removed, I have no problems reading
> the file and flattening the network, with either the 2.0 release or
> the current development version.
> Since we have established that there are different versions of the
> blif files for the iscas benchmarks out there, we can next try one of
> two experiments:
> 1. Can you remove the CRC_OUT_*_* outputs from your s35932.blif and
> see if you can read it without init_verify?
> 2. Can you send me a small model where you can get rl to work only if
> it is preceeded by init_verify?
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