>>>>> "ha" == hadi afshar <hparand@yahoo.com> writes:
ha> 1) What kind of optimization your software does,
Try "help synthesize_network," "help restruct_fsm," "help spfd_pilo,"
and "help spfd_pdlo" from within vis.
ha>and I want to know that ,does your software extracts functions
ha>from Verilog code,
vl2mv converts verilog to blif-MV.
ha> and do u have multiple and two level optimization,like what is
ha> done in synthesis.(for verification).
synthesize_network does that, but it is not for verification. In any
case, VIS is not a complete sysnthesis system.
ha> 2) What kind of verification ,your software supports?
CTL model checking. More details can be found in the on-line
documentation (http://vlsi.colorado.edu/~vis/whatis.html).
The next release of VIS will also support LTL model checking.
Fabio
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