Re: ask

From: Roderick Bloem (roderick.bloem@colorado.edu)
Date: Tue Apr 11 2000 - 09:51:33 MDT

  • Next message: uday kiran: "Writing blif file"

    No, it does not. If you look at the vis FAQ
    (http://vlsi.colorado.edu/~vis/doc/html/vis-faq.html), you will find a
    way of translating VHDL to blif, which Vis reads. This requires a
    commercial tool, though...

    I would like to hear of yur experiences if you manage to get your hands
    on one of those commercial tools!

    Best of luck,

    Roderick.

    > sllame wrote:
    >
    > Dear sir,
    > I would like to ask if your tool supports VHDL.
    >
    >
    > Azeddien Sllame
    > Brno University of Technology
    > Faculty of Electrical Engineering & Computer Science
    > Department of Computer Science & Engineering
    > Bozetechova 2, 612 66
    > Brno, Czech Republic



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