Flatten

The first step towards verification consists of ``flattening'' this hierarchical description into a single network (netlist of multi-valued logic gates and latches). The output of the design is a function of its inputs and the latches; this functionality is defined by the functions at the gates, and their interconnections. The flatten_hierarchy command creates this network, and the print_network command can be used to print it. Other related commands are print_network_stats command that prints statistics about the network, and test_network_acyclic command that checks the network for combinational cycles.

Note that when a node in the hierarchy is arrived at for the first time during the traversal of the hierarchy using cd, there is no network for that node until flatten_hierarchy is called for that node.

Also flatten_hierarchy automatically checks each table in the network for being deterministic (any non-determinism in the description is taken care of by pseudo-inputs) and completely specified. Since this checking takes some time, it can be turned off safely using the option flatten_hierarchy -b, after a BLIF-MV file has been checked once.