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References

1
D.E. Thomas, P.R. Moorby. The Verilog Hardware Description Language. Kluwer Academic Publishers, Nowell, Massachusetts, 1991.
2
S.-T. Cheng. Compiling Verilog into automata. Tech. Rep. UCB/ERL M94/37, May 1994.
3
F. Balarin, and R. Brayton, and S-T. Cheng, and D. Kirkpatrick, and A. Sangiovanni-Vincentelli. A Methodology for Formal Verification of Real-Time Systems. Tech. Rep. UCB/ERL M95/11, February 1995.
4
E.M. Sentovich et al. SIS: a system for sequential circuit synthesis. Tech. Rep. M92/41, May 1992.
5
C. Mead, L. Conway. Introduction to VLSI systems. Addison-Wesley, 1980.
6
R. K. Brayton et al. HSIS: A BDD based system for formal verification. Proc. of Design Automation Conference, 1994.
7
E. Clarke, and O. Grumberg, and K. McMillan, and X. Zhao. Efficient generation of counterexamples and witnesses in symbolic model checking. Proc. of Design Automation Conference, 1995.



Yuji Kukimoto
Tue Feb 6 11:58:14 PST 1996