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VIS-V: Verification

VIS-V provides analysis capabilities for designs. From any node in the hierarchy (the current node), executing the command flatten_hierarchy causes a flattened network to be created, representing everything from the current node down to the leaves of the hierarchy. Having a flattened representation in which all combinational ``gates'' and latches exist in a single network allows for the global analysis of that part of the design encompassed by the current node of the hierarchy. The packages of VIS-V are:

The nodes of a network have a single output. The function of a combinational node of a network is represented by a Tbl_Table_t. A k-output table in the hierarchy is represented by k combinational nodes in the corresponding network, where each of the k nodes points to the same table, but are distinguished by which output column they represent. This splitting is done by the flattening routine in the ntk package.

Throughout VIS-V, it is assumed that the combinational outputs are completely specified and deterministic. Non-determinism is introduced via pseudo-inputs . A pseudo-input is like a non-deterministic constant that can update its value on each clock cycle. See the documentation for the ntk package for more information on pseudo-inputs.

Because the emphasis of VIS-V is on analysis, the ability to modify the network data structure is not provided. It is assumed that once a network is created from the hierarchy, the network will be unchanged until it is destroyed.

Notice that the ntk package is independent of all other packages in VIS-V. This independence is maintained by allowing applications (e.g., fsm, part) to store information associated with a network in a lookup table. It is important to maintain this independence so that the ntk data structures do not become cluttered.



next up previous
Next: VIS-S: Synthesis Up:No Title Previous: VIS-F: Front End



Tom Shiple
Fri May 10 17:12:12 PDT 1996